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» Communication Mechanisms for Parallel DSP Systems on a Chip
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ICMCS
2006
IEEE
146views Multimedia» more  ICMCS 2006»
14 years 1 months ago
Collaborative Multithreading: An Open Scalable Processor Architecture for Embedded Multimedia Applications
Numerous approaches can be employed in exploiting computation power in processors such as superscalar, VLIW, SMT and multi-core on chip. In this paper, a UniCore VisoMT processor ...
Wei-Chun Ku, Shu-Hsuan Chou, Jui-Chin Chu, Chih-He...
IPPS
2006
IEEE
14 years 1 months ago
Realization of virtual networks in the DECOS integrated architecture
Due to the better utilization of computational and communication resources and the improved coordination of application subsystems, designers of large distributed embedded systems...
Roman Obermaisser, Philipp Peti
ICPP
2007
IEEE
14 years 2 months ago
Incentive-Driven P2P Anonymity System: A Game-Theoretic Approach
– Anonymous communication systems built on P2P infrastructures using anonymity forwarders are frequently affected by the churn problem, i.e. frequent joins and leaves of nodes. T...
Souvik Ray, Giora Slutzki, Zhao Zhang
IJCAI
1989
13 years 9 months ago
Neural Computing on a One Dimensional SIMD Array
Parallel processors offer a very attractive mechanism for the implementation of large neural networks. Problems in the usage of parallel processing in neural computing involve the...
Stephen S. Wilson
MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
14 years 2 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August