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» Compaction Schemes with Minimum Test Application Time
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ICASSP
2009
IEEE
14 years 2 months ago
Design of a morphological moving object signature and application to human identification
Many computer vision systems try to infer semantic information about a video scene content by looking at the time series of the silhouettes of the moving objects. This paper propo...
Olivier Barnich, Marc Van Droogenbroeck
DATE
2008
IEEE
100views Hardware» more  DATE 2008»
14 years 2 months ago
Towards Trojan-Free Trusted ICs: Problem Analysis and Detection Scheme
There have been serious concerns recently about the security of microchips from hardware trojan horse insertion during manufacturing. This issue has been raised recently due to ou...
Francis G. Wolff, Christos A. Papachristou, Swarup...
SSDBM
2002
IEEE
128views Database» more  SSDBM 2002»
14 years 29 days ago
Compressing Bitmap Indexes for Faster Search Operations
In this paper, we study the effects of compression on bitmap indexes. The main operations on the bitmaps during query processing are bitwise logical operations such as AND, OR, N...
Kesheng Wu, Ekow J. Otoo, Arie Shoshani
DATE
2010
IEEE
161views Hardware» more  DATE 2010»
14 years 1 months ago
BISD: Scan-based Built-In self-diagnosis
Abstract—Built-In Self-Test (BIST) is less often applied to random logic than to embedded memories due to the following reasons: Firstly, for a satisfiable fault coverage it may...
Melanie Elm, Hans-Joachim Wunderlich
JSA
2007
191views more  JSA 2007»
13 years 8 months ago
Automated memory-aware application distribution for Multi-processor System-on-Chips
Mapping of applications on a Multiprocessor System-on-Chip (MP-SoC) is a crucial step to optimize performance, energy and memory constraints at the same time. The problem is formu...
Heikki Orsila, Tero Kangas, Erno Salminen, Timo D....