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DATE
2000
IEEE
136views Hardware» more  DATE 2000»
13 years 12 months ago
Parametric Fault Simulation and Test Vector Generation
Process variation has forever been the major fail cause of analog circuit where small deviations in component values cause large deviations in the measured output parameters. This...
Khaled Saab, Naim Ben Hamida, Bozena Kaminska
VLSID
2007
IEEE
160views VLSI» more  VLSID 2007»
14 years 7 months ago
Spectral RTL Test Generation for Microprocessors
We introduce a novel method of test generation for microprocessors at the RTL using spectral methods. Test vectors are generated for RTL faults, which are the stuck-at faults on i...
Nitin Yogi, Vishwani D. Agrawal
IPPS
2009
IEEE
14 years 2 months ago
A fusion-based approach for tolerating faults in finite state machines
Given a set of n different deterministic finite state machines (DFSMs) modeling a distributed system, we examine the problem of tolerating f crash or Byzantine faults in such a ...
Vinit A. Ogale, Bharath Balasubramanian, Vijay K. ...
DAC
1997
ACM
13 years 11 months ago
Automatic Generation of Synchronous Test Patterns for Asynchronous Circuits
This paper presents a novel approach for automatic test pattern generation of asynchronous circuits. The techniques used for this purpose assume that the circuit can only be exerc...
Oriol Roig, Jordi Cortadella, Marco A. Peña...
ECOOP
2006
Springer
13 years 11 months ago
Augmenting Automatically Generated Unit-Test Suites with Regression Oracle Checking
A test case consists of two parts: a test input to exercise the program under test and a test oracle to check the correctness of the test execution. A test oracle is often in the f...
Tao Xie