Sciweavers

128 search results - page 17 / 26
» Comparative Evaluation of Latency Tolerance Techniques for S...
Sort
View
CASES
2008
ACM
13 years 9 months ago
A light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization
While technology advances have made MPSoCs a standard architecture for embedded systems, their applicability is increasingly being challenged by dramatic increases in the amount o...
Chengmo Yang, Alex Orailoglu
PPOPP
2009
ACM
14 years 8 months ago
Atomic quake: using transactional memory in an interactive multiplayer game server
Transactional Memory (TM) is being studied widely as a new technique for synchronizing concurrent accesses to shared memory data structures for use in multi-core systems. Much of ...
Adrián Cristal, Eduard Ayguadé, Fera...
ASPLOS
2010
ACM
14 years 2 months ago
Addressing shared resource contention in multicore processors via scheduling
Contention for shared resources on multicore processors remains an unsolved problem in existing systems despite significant research efforts dedicated to this problem in the past...
Sergey Zhuravlev, Sergey Blagodurov, Alexandra Fed...
ICS
1998
Tsinghua U.
13 years 11 months ago
Data Prefetching for Software DSMs
In this paper we propose and evaluate the Adaptive++ technique, a novel runtime-only data prefetching strategy for software-based distributed shared-memory systems (software DSMs)...
Ricardo Bianchini, Raquel Pinto, Claudio Luis de A...
FPL
2004
Springer
164views Hardware» more  FPL 2004»
13 years 11 months ago
Dynamic Prefetching in the Virtual Memory Window of Portable Reconfigurable Coprocessors
Abstract. In Reconfigurable Systems-On-Chip (RSoCs), operating systems can primarily (1) manage the sharing of limited reconfigurable resources, and (2) support communication betwe...
Miljan Vuletic, Laura Pozzi, Paolo Ienne