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VLSID
2008
IEEE
142views VLSI» more  VLSID 2008»
14 years 8 months ago
Temperature and Process Variations Aware Power Gating of Functional Units
Technology scaling has resulted in an exponential increase in the leakage power as well as the variations in leakage power of fabricated chips. Functional units (FUs), like Intege...
Deepa Kannan, Aviral Shrivastava, Vipin Mohan, Sar...
ASPDAC
2007
ACM
87views Hardware» more  ASPDAC 2007»
13 years 11 months ago
An Embedded Low Power/Cost 16-Bit Data/Instruction Microprocessor Compatible with ARM7 Software Tools
- A 16-bit THUMB instruction set microprocessor is proposed for low cost/power in short-precision computing. It achieves 40% gate count, 51% power consumption and 160% clock freque...
Fu-Ching Yang, Ing-Jer Huang
VLSID
2007
IEEE
99views VLSI» more  VLSID 2007»
14 years 8 months ago
Low Power Implementation for Minimum Norm Sorting and Block Upper Tri-angularization of Matrices used in MIMO Wireless Systems
Multiple Input - Multiple Output (MIMO) wireless technology involves highly complex vectors and matrix computations which are directly related to increased power and area consumpt...
Zahid Khan, Tughrul Arslan, John S. Thompson, Ahme...
IPPS
2006
IEEE
14 years 1 months ago
Power consumption comparison for regular wireless topologies using fault-tolerant beacon vector routing
Fault-tolerant Beacon Vector Routing (FBVR) is an efficient technique for routing in the presence of node failures. Several common wireless topologies exist that can be used with...
Luke Demoracski, Dimiter R. Avresky