The large working sets of commercial and scientific workloads stress the L2 caches of Chip Multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache c...
Bradford M. Beckmann, Michael R. Marty, David A. W...
Abstract. We report on the use of model checking techniques for both the verification of a process control program and the derivation of optimal control schedules. Most of this wor...
The Simulink/Stateflow (SL/SF) environment from Mathworks is becoming the de facto standard in industry for model based development of embedded control systems. Many commercial to...
Abstract: A hybrid quantum mechanical/molecular mechanical (QM/MM) potential energy function with HartreeFock, density functional theory (DFT), and post-HF (RIMP2, MP2, CCSD) capab...
H. Lee Woodcock III, Milan Hodoscek, Andrew T. B. ...
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...