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ISCA
1989
IEEE
120views Hardware» more  ISCA 1989»
15 years 7 months ago
Comparing Software and Hardware Schemes For Reducing the Cost of Branches
Pipelining has become a common technique to increase throughput of the instruction fetch, instruction decode, and instruction execution portions of modern computers. Branch instru...
Wen-mei W. Hwu, Thomas M. Conte, Pohua P. Chang
ISCA
2007
IEEE
115views Hardware» more  ISCA 2007»
15 years 9 months ago
VPC prediction: reducing the cost of indirect branches via hardware-based dynamic devirtualization
Indirect branches have become increasingly common in modular programs written in modern object-oriented languages and virtualmachine based runtime systems. Unfortunately, the pred...
Hyesoon Kim, José A. Joao, Onur Mutlu, Chan...
HPCA
2007
IEEE
16 years 3 months ago
Improving Branch Prediction and Predicated Execution in Out-of-Order Processors
If-conversion is a compiler technique that reduces the misprediction penalties caused by hard-to-predict branches, transforming control dependencies into data dependencies. Althou...
Eduardo Quiñones, Joan-Manuel Parcerisa, An...
VLSID
2007
IEEE
100views VLSI» more  VLSID 2007»
16 years 3 months ago
Hardware Efficient Piecewise Linear Branch Predictor
Piecewise linear branch predictor has been demonstrated to have superior prediction accuracy; however, its huge hardware overhead prevents the predictor from being practical in the...
Jiajin Tu, Jian Chen, Lizy K. John
MICRO
2005
IEEE
133views Hardware» more  MICRO 2005»
15 years 8 months ago
Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution
Predicated execution has been used to reduce the number of branch mispredictions by eliminating hard-to-predict branches. However, the additional instruction overhead and addition...
Hyesoon Kim, Onur Mutlu, Jared Stark, Yale N. Patt