Sciweavers

898 search results - page 152 / 180
» Comparing high-level modeling approaches for embedded system...
Sort
View
ISPD
2006
ACM
126views Hardware» more  ISPD 2006»
14 years 1 months ago
Noise driven in-package decoupling capacitor optimization for power integrity
The existing decoupling capacitance optimization approaches meet constraints on input impedance for package. In this paper, we show that using impedance as constraints leads to la...
Jun Chen, Lei He
INFOCOM
2005
IEEE
14 years 1 months ago
The impact of imperfect scheduling on cross-layer rate control in wireless networks
— In this paper, we study cross-layer design for rate control in multihop wireless networks. In our previous work, we have developed an optimal cross-layered rate control scheme ...
Xiaojun Lin, Ness B. Shroff
ICS
2010
Tsinghua U.
13 years 6 months ago
Decomposable and responsive power models for multicore processors using performance counters
Abstract—Power modeling based on performance monitoring counters (PMCs) has attracted the interest of many researchers since it become a quick approach to understand and analyse ...
Ramon Bertran, Marc González, Xavier Martor...
ISSS
2000
IEEE
128views Hardware» more  ISSS 2000»
13 years 12 months ago
Hardware Synthesis from SPDF Representation for Multimedia Applications
Even though high-level hardware synthesis from dataflow graphs becomes popular in designing DSP systems, currently used dataflow models are inefficient to deal with emerging multi...
Chanik Park, Soonhoi Ha
ICPADS
1994
IEEE
13 years 11 months ago
Stochastic Modeling of Scaled Parallel Programs
Testingthe performance scalabilityof parallelprograms can be a time consuming task, involving many performance runs for different computer configurations, processor numbers, and p...
Allen D. Malony, Vassilis Mertsiotakis, Andreas Qu...