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FPGA
2009
ACM
343views FPGA» more  FPGA 2009»
14 years 3 months ago
Fpga-based face detection system using Haar classifiers
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kas...
DATE
2010
IEEE
153views Hardware» more  DATE 2010»
13 years 7 months ago
Heterogeneous vs homogeneous MPSoC approaches for a Mobile LTE modem
— Applications like 4G baseband modem require single-chip implementation to meet the integration and power consumption requirements. These applications demand a high computing pe...
Camille Jalier, Didier Lattard, Ahmed Amine Jerray...
VLSID
2002
IEEE
98views VLSI» more  VLSID 2002»
14 years 8 months ago
On Test Scheduling for Core-Based SOCs
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Sandeep Koranne
GLOBECOM
2007
IEEE
14 years 2 months ago
Inter-Area Shared Segment Protection of MPLS Flows Over Agile All-Photonic Star Networks
—We study the resilience of MPLS flows over an agile all-photonic star WDM network (AAPN). On the basis of our previous inter-area optimal routing architecture, we propose and de...
Peng He, Gregor von Bochmann
HIS
2008
13 years 10 months ago
Bio-Inspired Parameter Tunning of MLP Networks for Gene Expression Analysis
The performance of Artificial Neural Networks is largely influenced by the value of their parameters. Among these free parameters, one can mention those related with the network a...
André L. D. Rossi, André C. P. L. F....