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ISCA
2009
IEEE
180views Hardware» more  ISCA 2009»
14 years 3 months ago
Decoupled DIMM: building high-bandwidth memory system using low-speed DRAM devices
The widespread use of multicore processors has dramatically increased the demands on high bandwidth and large capacity from memory systems. In a conventional DDR2/DDR3 DRAM memory...
Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zh...
MICRO
2009
IEEE
99views Hardware» more  MICRO 2009»
14 years 3 months ago
Low-cost router microarchitecture for on-chip networks
On-chip networks are critical to the scaling of future multicore processors. The challenge for on-chip network is to reduce the cost including power consumption and area while pro...
John Kim
MICRO
2009
IEEE
178views Hardware» more  MICRO 2009»
14 years 3 months ago
Improving cache lifetime reliability at ultra-low voltages
Voltage scaling is one of the most effective mechanisms to reduce microprocessor power consumption. However, the increased severity of manufacturing-induced parameter variations a...
Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerso...
ARCS
2009
Springer
14 years 3 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
ATAL
2009
Springer
14 years 3 months ago
Distributed constraint optimization with structured resource constraints
Distributed constraint optimization (DCOP) provides a framework for coordinated decision making by a team of agents. Often, during the decision making, capacity constraints on age...
Akshat Kumar, Boi Faltings, Adrian Petcu