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» Comparison of Heuristic Algorithms for Variable Partitioning...
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113
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FMCAD
2004
Springer
15 years 9 months ago
Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders
This paper describes a new method that is useful in combinational equivalence checking with very challenging industrial designs. The method does not build a miter; instead it build...
In-Ho Moon, Carl Pixley
131
Voted
ISLPED
1995
ACM
122views Hardware» more  ISLPED 1995»
15 years 7 months ago
A multiple clocking scheme for low power RTL design
This paper presents an e ective multiple clocking scheme for lower power RTL circuit design. The basis is to partition a behavioral description of the circuit into m modules fed b...
Christos A. Papachristou, Mark Spining, Mehrdad No...
130
Voted
IEEEPACT
2009
IEEE
15 years 10 months ago
Soft-OLP: Improving Hardware Cache Performance through Software-Controlled Object-Level Partitioning
—Performance degradation of memory-intensive programs caused by the LRU policy’s inability to handle weaklocality data accesses in the last level cache is increasingly serious ...
Qingda Lu, Jiang Lin, Xiaoning Ding, Zhao Zhang, X...
123
Voted
ISCAS
2005
IEEE
133views Hardware» more  ISCAS 2005»
15 years 9 months ago
Multiobjective VLSI cell placement using distributed simulated evolution algorithm
— Simulated Evolution (SimE) is a sound stochastic approximation algorithm based on the principles of adaptation. If properly engineered it is possible for SimE to reach nearopti...
Sadiq M. Sait, Ali Mustafa Zaidi, Mustafa I. Ali
160
Voted
ATVA
2006
Springer
153views Hardware» more  ATVA 2006»
15 years 7 months ago
Learning-Based Symbolic Assume-Guarantee Reasoning with Automatic Decomposition
Abstract. Compositional reasoning aims to improve scalability of verification tools by reducing the original verification task into subproblems. The simplification is typically bas...
Wonhong Nam, Rajeev Alur