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» Compilation Techniques for Out-of-Core Parallel Computations
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MICRO
2000
IEEE
176views Hardware» more  MICRO 2000»
13 years 8 months ago
An Advanced Optimizer for the IA-64 Architecture
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
Rakesh Krishnaiyer, Dattatraya Kulkarni, Daniel M....
ICS
2005
Tsinghua U.
14 years 2 months ago
Disk layout optimization for reducing energy consumption
Excessive power consumption is becoming a major barrier to extracting the maximum performance from high-performance parallel systems. Therefore, techniques oriented towards reduci...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir
DATE
2008
IEEE
156views Hardware» more  DATE 2008»
14 years 3 months ago
Transparent Reconfigurable Acceleration for Heterogeneous Embedded Applications
Embedded systems are becoming increasingly complex. Besides the additional processing capabilities, they are characterized by high diversity of computational models coexisting in ...
Antonio Carlos Schneider Beck, Mateus B. Rutzig, G...
EUROPAR
2007
Springer
14 years 2 months ago
Compositional Approach Applied to Loop Specialization
An optimizing compiler has a hard time to generate a code which will perform at top speed for an arbitrary data set size. In general, the low level optimization process must take i...
Lamia Djoudi, Jean-Thomas Acquaviva, Denis Barthou
IEEEPACT
2006
IEEE
14 years 2 months ago
Region array SSA
Static Single Assignment (SSA) has become the intermediate program representation of choice in most modern compilers because it enables efficient data flow analysis of scalars an...
Silvius Rus, Guobin He, Christophe Alias, Lawrence...