1338 search results - page 24 / 268 » Compiler Architectures for Heterogeneous Systems |
111
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SRDS
2007
IEEE
15 years 8 months ago
2007
IEEE
Fault tolerant distributed protocols typically utilize a homogeneous fault model, either fail-crash or fail-Byzantine, where all processors are assumed to fail in the same manner....
111
Voted
DAC
2000
ACM
16 years 3 months ago
2000
ACM
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
111
Voted
ISLPED
2005
ACM
15 years 8 months ago
2005
ACM
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
146
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SASP
2009
IEEE
15 years 9 months ago
2009
IEEE
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
107
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SAINT
2005
IEEE
15 years 8 months ago
2005
IEEE
This paper presents a middleware architecture for the adaptable management of heterogeneous wireless resources. The main application of the proposed architecture is the optimal ut...