During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Vector-thread (VT) architectures exploit multiple forms of parallelism simultaneously. This paper describes a compiler for the Scale VT architecture, which takes advantage of the ...
The design of future high-performance embedded systems is hampered by two problems: First, the required hardware needs more energy than is available from batteries. Second, curren...
Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefa...
By coupling a reconfigurable hardware to a standard processor, high levels of flexibility and adaptability are achieved. However, this approach requires modifications to the compi...
Nikolaos Vassiliadis, George Theodoridis, Spiridon...
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...