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DATE
2002
IEEE
101views Hardware» more  DATE 2002»
14 years 2 months ago
EAC: A Compiler Framework for High-Level Energy Estimation and Optimization
This paper presents a novel Energy-Aware Compilation (EAC) framework that can estimate and optimize energy consumption of a given code taking as input the architectural and techno...
Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vija...
AAAI
1994
13 years 11 months ago
A Qualitative Physics Compiler
Predicting the behavior of physical systems is essential to both common sense and engineering tasks. It is made especially challenging by the lack of complete precise knowledge of...
Adam Farquhar
ASPDAC
2004
ACM
129views Hardware» more  ASPDAC 2004»
14 years 3 months ago
Instruction buffering exploration for low energy VLIWs with instruction clusters
— For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, software controlled ...
Tom Vander Aa, Murali Jayapala, Francisco Barat, G...
IEEEPACT
2000
IEEE
14 years 2 months ago
Exploring Sub-Block Value Reuse for Superscalar Processors
The performance potential of a value reuse mechanism depends on its reuse detection time, the number of reuse opportunities, and the amount of work saved by skipping each reuse un...
Jian Huang, David J. Lilja
KBSE
2006
IEEE
14 years 3 months ago
A Portable Compiler-Integrated Approach to Permanent Checking
Program checking technology is now a mature technology, but is not yet used on a large scale. We identify one cause of this gap in the decoupling of checking tools from the everyd...
Eugen-Nicolae Volanschi