118 search results - page 13 / 24 » Compiler Support for Exploiting Coarse-Grained Pipelined Par... |
ICS
2005
Tsinghua U.
15 years 9 months ago
2005
Tsinghua U.
Chip Multiprocessors (CMPs) are flexible, high-frequency platforms on which to support Thread-Level Speculation (TLS). However, for TLS to deliver on its promise, CMPs must explo...
125
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APCSAC
2000
IEEE
15 years 7 months ago
2000
IEEE
This paper briefly reviews the current research into RISC microprocessor architecture, which now seems to be so complex as to make the acronym somewhat of an oxymoron. In response...
119
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MICRO
2006
IEEE
15 years 9 months ago
2006
IEEE
As the industry moves toward larger-scale chip multiprocessors, the need to parallelize applications grows. High inter-thread communication delays, exacerbated by over-stressed hi...
118
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HPCA
1999
IEEE
15 years 7 months ago
1999
IEEE
In general-purpose microprocessors, recent trends have pushed towards 64-bit word widths, primarily to accommodate the large addressing needs of some programs. Many integer proble...
143
Voted
HPCA
1998
IEEE
15 years 7 months ago
1998
IEEE
Most of the prediction mechanisms predict a single path to continue the execution on a branch. Alternatively, we may exploit parallelism from either possible paths of a branch, di...