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102
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MICRO
2009
IEEE
113views Hardware» more  MICRO 2009»
15 years 10 months ago
Portable compiler optimisation across embedded programs and microarchitectures using machine learning
Building an optimising compiler is a difficult and time consuming task which must be repeated for each generation of a microprocessor. As the underlying microarchitecture changes...
Christophe Dubach, Timothy M. Jones, Edwin V. Boni...
154
Voted
CASES
2001
ACM
15 years 7 months ago
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
Girish Venkataramani, Walid A. Najjar, Fadi J. Kur...
118
Voted
DASIP
2010
14 years 10 months ago
Hardware code generation from dataflow programs
The elaboration of new systems on embedded targets is becoming more and more complex. In particular, multimedia devices are now implemented using mixed hardware and software archi...
Nicolas Siret, Matthieu Wipliez, Jean-Franç...
133
Voted
IPPS
2010
IEEE
15 years 1 months ago
Static macro data flow: Compiling global control into local control
Abstract--The expression of parallel codes through abstract, high-level specifications of global control and data flow can greatly simplify the task of creating large parallel prog...
Pritish Jetley, Laxmikant V. Kalé
142
Voted
EUROPAR
2005
Springer
15 years 9 months ago
SPC-XML: A Structured Representation for Nested-Parallel Programming Languages
Nested-parallelism programming models, where the task graph associated to a computation is series-parallel, present good analysis properties that can be exploited for scheduling, c...
Arturo González-Escribano, Arjan J. C. van ...