Sciweavers

53 search results - page 5 / 11
» Compiler-Directed Dynamic Frequency and Voltage Scheduling
Sort
View
VLSID
2003
IEEE
92views VLSI» more  VLSID 2003»
14 years 8 months ago
Energy Efficient Scheduling for Datapath Synthesis
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...
Saraju P. Mohanty, N. Ranganathan
DAC
2009
ACM
14 years 2 months ago
On-line thermal aware dynamic voltage scaling for energy optimization with frequency/temperature dependency consideration
With new technologies, temperature has become a major issue to be considered at system level design. Without taking temperature aspects into consideration, no approach to energy o...
Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng
PLDI
2003
ACM
14 years 24 days ago
Compile-time dynamic voltage scaling settings: opportunities and limits
With power-related concerns becoming dominant aspects of hardware and software design, significant research effort has been devoted towards system power minimization. Among run-t...
Fen Xie, Margaret Martonosi, Sharad Malik
ISPDC
2003
IEEE
14 years 25 days ago
Hardware-based Power Management for Real-Time Applications
— This paper presents a new power management technique integrated into a multithreaded microcontroller with builtin real-time scheduling schemes. Power management is done by hard...
Sascha Uhrig, Theo Ungerer
GLVLSI
2003
IEEE
119views VLSI» more  GLVLSI 2003»
14 years 25 days ago
Simultaneous peak and average power minimization during datapath scheduling for DSP processors
The use of multiple supply voltages for energy and average power reduction is well researched and several works have appeared in the literature. However, in low power design using...
Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappi...