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LISP
2006
160views more  LISP 2006»
13 years 8 months ago
Formal compiler construction in a logical framework
The task of designing and implementing a compiler can be a difficult and error-prone process. In this paper, we present a new approach based on the igher-order abstract syntax and ...
Jason Hickey, Aleksey Nogin
EICS
2011
ACM
12 years 11 months ago
Hayaku: designing and optimizing finely tuned and portable interactive graphics with a graphical compiler
Although reactive and graphically rich interfaces are now mainstream, their development is still a notoriously difficult task. This paper presents Hayaku, a toolset that supports...
Benjamin Tissoires, Stéphane Conversy
CASES
2004
ACM
14 years 1 months ago
A low power architecture for embedded perception
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
Binu K. Mathew, Al Davis, Michael Parker
TVLSI
2002
102views more  TVLSI 2002»
13 years 7 months ago
Low-power data forwarding for VLIW embedded architectures
In this paper, we propose a low-power approach to the design of embedded very long instruction word (VLIW) processor architectures based on the forwarding (or bypassing) hardware, ...
Mariagiovanna Sami, Donatella Sciuto, Cristina Sil...
DATE
2008
IEEE
114views Hardware» more  DATE 2008»
14 years 2 months ago
Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors
—The contribution of memory latency to execution time continues to increase, and latency hiding mechanisms become ever more important for efficient processor design. While high-...
Sanghyun Park, Aviral Shrivastava, Yunheung Paek