1198 search results - page 12 / 240 » Compiling for EDGE Architectures |
GLVLSI
2010
IEEE
14 years 20 days ago
2010
IEEE
The development of compiler-based mechanisms to reduce the percentage of hotspots and optimize the thermal profile of large register files has become an important issue. Thermal...
CF
2004
ACM
14 years 1 months ago
2004
ACM
Next generation architectures will require innovative solutions to reduce energy consumption. One of the trends we expect is more extensive utilization of compiler information dir...
PPOPP
2003
ACM
14 years 24 days ago
2003
ACM
Speculative multithreading (SpMT) architecture can exploit thread-level parallelism that cannot be identified statically. Speedup can be obtained by speculatively executing threa...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
CASES
2005
ACM
13 years 9 months ago
2005
ACM
Horizontally partitioned data caches are a popular architectural feature in which the processor maintains two or more data caches at the same level of hierarchy. Horizontally part...