1198 search results - page 134 / 240 » Compiling for EDGE Architectures |
ICCD
2000
IEEE
16 years 10 days ago
2000
IEEE
In superscalar architectures, out-of-order issue mechanisms increase performance by dynamically rescheduling instructions that cannot be statically reordered by the compiler. Whil...
112
Voted
CHI
2010
ACM
15 years 10 months ago
2010
ACM
Interpreting compiler errors and exception messages is challenging for novice programmers. Presenting examples of how other programmers have corrected similar errors may help novi...
123
Voted
IEEEPACT
2009
IEEE
15 years 10 months ago
2009
IEEE
Abstract—Load elimination is a classical compiler transformation that is increasing in importance for multi-core and many-core architectures. The effect of the transformation is ...
129
Voted
CGO
2006
IEEE
15 years 9 months ago
2006
IEEE
Multicluster architectures overcome the scaling problem of centralized resources by distributing the datapath, register file, and memory subsystem across multiple clusters connec...
122
Voted
FCCM
2006
IEEE
15 years 9 months ago
2006
IEEE
In this paper, we present hthreads, a unifying programming model for specifying application threads running within a hybrid CPU/FPGA system. Threads are specified from a single p...