1198 search results - page 1 / 240 » Compiling for EDGE Architectures |
CGO
2006
IEEE
14 years 1 months ago
2006
IEEE
Explicit Data Graph Execution (EDGE) architectures offer the possibility of high instruction-level parallelism with energy efficiency. In EDGE architectures, the compiler breaks ...
ASPLOS
2006
ACM
14 years 1 months ago
2006
ACM
Growing on-chip wire delays are motivating architectural features that expose on-chip communication to the compiler. EDGE architectures are one example of communication-exposed mi...
IJCAI
1989
13 years 8 months ago
1989
This paper introduces a partition of the possible forms of knowledge according to their rela tionship to the basic objective of an intelligent agent, namely to act successfully ...
MICRO
2006
IEEE
14 years 1 months ago
2006
IEEE
VLIW and EDGE (Explicit Data Graph Execution) architectures rely on compilers to form high-quality hyperblocks for good performance. These compilers typically perform hyperblock f...
PLDI
2003
ACM
14 years 24 days ago
2003
ACM
Clustered architectures are a solution to the bottleneck of centralized register files in superscalar and VLIW processors. The main challenge associated with clustered architectu...