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ISCA
1998
IEEE
151views Hardware» more  ISCA 1998»
14 years 1 months ago
Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
David I. August, Daniel A. Connors, Scott A. Mahlk...
CASES
2004
ACM
14 years 2 months ago
A low power architecture for embedded perception
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
Binu K. Mathew, Al Davis, Michael Parker
PDP
2002
IEEE
14 years 1 months ago
The CDAG: A Data Structure for Automatic Parallelization for a Multithreaded Architecture
Despite the explosive new interest in Distributed Computing, bringing software — particularly legacy software — to parallel platforms remains a daunting task. The Self Distrib...
Bernd Klauer, Frank Eschmann, Ronald Moore, Klaus ...
WIESS
2000
13 years 10 months ago
Stub-Code Performance Is Becoming Important
As IPC mechanisms become faster, stub-code efficiency becomes a performance issue for local client/server RPCs and inter-component communication. Inefficient and unnecessary compl...
Andreas Haeberlen, Jochen Liedtke, Yoonho Park, La...
ISPDC
2008
IEEE
14 years 3 months ago
A Runtime System Architecture for Ubiquitous Support of OpenMP
In this work we present the runtime architecture of the OMPi OpenMP compiler. OMPi is a source-to-source C translator featuring a portable, modular and extensible runtime system. ...
Giorgos Ch. Philos, Vassilios V. Dimakopoulos, Pan...