1198 search results - page 66 / 240 » Compiling for EDGE Architectures |
DAC
1996
ACM
14 years 1 months ago
1996
ACM
This paper discusses the design of a chip using architectural synthesis. The chip, FADIC, is applied in Digital Audio Broadcasting (DAB) receivers. It shows that architectural syn...
SAC
2006
ACM
14 years 2 months ago
2006
ACM
Esterel is a concurrent synchronous language for developing reactive systems. As an alternative to the classical software and hardware synthesis paths, the reactive processing app...
MP
1998
13 years 8 months ago
1998
In this paper we consider the problem of ^-partitioning the nodes of a graph with capacity restrictions on the sum of the node weights in each subset of the partition, and the obje...
AOSD
2009
ACM
14 years 3 months ago
2009
ACM
ive semantics for aspect-oriented abstractions can be defined by language designers using extensible aspect compiler frameworks. However, application developers are prevented fro...
DELTA
2010
IEEE
14 years 2 months ago
2010
IEEE
High level hardware description languages aim to make hardware design more like programming software. These languages are often used to accelerate legacy software algorithms by ...