39 search results - page 4 / 8 » Compiling for SIMD Within a Register |
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
Many commercially available embedded processors are capable of extending their base instruction set for a specific domain of applications. While steady progress has been made in t...
ISCA
2002
IEEE
13 years 7 months ago
2002
IEEE
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
CC
2003
Springer
14 years 22 days ago
2003
Springer
We define the Value State Dependence Graph (VSDG). The VSDG is a form of the Value Dependence Graph (VDG) extended by the addition of state dependence edges to model sequentialise...
VLSID
1999
IEEE
13 years 11 months ago
1999
IEEE
Abstract Code optimization for digital signal processors DSPs has been identi ed as an important new topic in system-level design of embedded systems. Both DSP processors and algor...
CGO
2006
IEEE
14 years 1 months ago
2006
IEEE
Explicit Data Graph Execution (EDGE) architectures offer the possibility of high instruction-level parallelism with energy efficiency. In EDGE architectures, the compiler breaks ...