1133 search results - page 106 / 227 » Compiling for Speculative Architectures |
148
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LCPC
2007
Springer
15 years 10 months ago
2007
Springer
Massively parallel SIMD array architectures are making their way into embedded processors. In these architectures, a number of identical processing elements having small private st...
115
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DATE
2010
IEEE
15 years 9 months ago
2010
IEEE
—This paper suggests a new approach for bitstream processing of embedded systems, using a combination of C++ metaprogramming combined with architecture extensions of an customiza...
131
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DAC
2005
ACM
16 years 5 months ago
2005
ACM
Device and interconnect fabrics at the nanoscale will have a density of defects and susceptibility to transient faults far exceeding those of current silicon technologies. In this...
114
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SC
2009
ACM
15 years 11 months ago
2009
ACM
The present contribution explores the design space for virtual channel (VC) and switch allocators in network-on-chip (NoC) routers. Based on detailed RTL-level implementations, we...
129
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ISSS
2002
IEEE
15 years 9 months ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...