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» Compiling for Speculative Architectures
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IFIPPACT
1994
15 years 5 months ago
Exploiting the Parallelism Exposed by Partial Evaluation
: We describe an approach to parallel compilation that seeks to harness the vast amount of ne-grain parallelism that is exposed through partial evaluation of numerically-intensive ...
Rajeev J. Surati, Andrew A. Berlin
MICRO
2002
IEEE
121views Hardware» more  MICRO 2002»
15 years 3 months ago
Convergent scheduling
Convergent scheduling is a general framework for instruction scheduling and cluster assignment for parallel, clustered architectures. A convergent scheduler is composed of many ind...
Walter Lee, Diego Puppin, Shane Swenson, Saman P. ...
DAC
2004
ACM
16 years 5 months ago
A novel approach for flexible and consistent ADL-driven ASIP design
Architecture description languages (ADL) have been established to aid the design of application-specific instruction-set processors (ASIP). Their main contribution is the automati...
Achim Nohl, Gunnar Braun, Hanno Scharwächter,...
JPDC
2000
141views more  JPDC 2000»
15 years 3 months ago
A System for Evaluating Performance and Cost of SIMD Array Designs
: SIMD arrays are likely to become increasingly important as coprocessors in domain specific systems as architects continue to leverage RAM technology in their design. The problem ...
Martin C. Herbordt, Jade Cravy, Renoy Sam, Owais K...
MICRO
1998
IEEE
111views Hardware» more  MICRO 1998»
15 years 8 months ago
Precise Register Allocation for Irregular Architectures
This paper proposes a precise approach to register allocation for irregular-register architectures which is based on 0-1 integer programming (IP). Prior work shows that IP registe...
Timothy Kong, Kent D. Wilken