1133 search results - page 12 / 227 » Compiling for Speculative Architectures |
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
Multi-core processors, with low communication costs and high availability of execution cores, will increase the use of execution and compilation models that use short threads to e...
HPCA
2003
IEEE
14 years 7 months ago
2003
IEEE
Thread-level speculation provides architectural support to aggressively run hard-to-analyze code in parallel. As speculative tasks run concurrently, they generate unsafe or specul...
ISHPC
2000
Springer
13 years 11 months ago
2000
Springer
Traditional parallel compilers do not effectively parallelize irregular applications because they contain little looplevel parallelism due to ambiguous memory references. We explo...
ICS
1999
Tsinghua U.
13 years 11 months ago
1999
Tsinghua U.
Instruction scheduling is an important compiler technique for exploiting more instruction-level parallelism (ILP) in high-performance microprocessors, and in this paper, we study ...
APCSAC
2000
IEEE
13 years 11 months ago
2000
IEEE
This paper briefly reviews the current research into RISC microprocessor architecture, which now seems to be so complex as to make the acronym somewhat of an oxymoron. In response...