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DAC
2006
ACM
14 years 9 months ago
An efficient and versatile scheduling algorithm based on SDC formulation
Scheduling plays a central role in the behavioral synthesis process, which automatically compiles high-level specifications into optimized hardware implementations. However, most ...
Jason Cong, Zhiru Zhang
DAC
2006
ACM
14 years 9 months ago
Exploiting forwarding to improve data bandwidth of instruction-set extensions
Application-specific instruction-set extensions (custom instructions) help embedded processors achieve higher performance. Most custom instructions offering significant performanc...
Ramkumar Jayaseelan, Haibin Liu, Tulika Mitra
VLSID
2002
IEEE
125views VLSI» more  VLSID 2002»
14 years 8 months ago
Software Pipelining for Coarse-Grained Reconfigurable Instruction Set Processors
This paper shows that software pipelining can be an effective technique for code generation for coarse-grained reconfigurable instruction set processors. The paper describes a tec...
Francisco Barat, Murali Jayapala, Pieter Op de Bee...
HPCA
2002
IEEE
14 years 8 months ago
The Minimax Cache: An Energy-Efficient Framework for Media Processors
This work is based on our philosophy of providing interlayer system-level power awareness in computing systems [26, 27]. Here, we couple this approach with our vision of multipart...
Osman S. Unsal, Israel Koren, C. Mani Krishna, Csa...
SIGMOD
2005
ACM
159views Database» more  SIGMOD 2005»
14 years 8 months ago
System RX: One Part Relational, One Part XML
This paper describes the overall architecture and design aspects of a hybrid relational and XML database system called System RX. We believe that such a system is fundamental in t...
Kevin S. Beyer, Roberta Cochrane, Vanja Josifovski...