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» Compiling for Speculative Architectures
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GLVLSI
2010
IEEE
210views VLSI» more  GLVLSI 2010»
14 years 1 months ago
Overscaling-friendly timing speculation architectures
Processors have traditionally been designed for the worst-case, resulting in designs that have high yields, but are expensive in terms of area and power. Better-than-worst-case (B...
John Sartori, Rakesh Kumar
ICCD
2004
IEEE
100views Hardware» more  ICCD 2004»
14 years 5 months ago
A Minimal Dual-Core Speculative Multi-Threading Architecture
Speculative Multi-Threading (SpMT) can improve single-threaded application performance using the multiple thread contexts available in current processors. We propose a minimal SpM...
Srikanth T. Srinivasan, Haitham Akkary, Tom Holman...
ISCA
2003
IEEE
183views Hardware» more  ISCA 2003»
14 years 1 months ago
The Jrpm System for Dynamically Parallelizing Java Programs
We describe the Java runtime parallelizing machine (Jrpm), a complete system for parallelizing sequential programs automatically. Jrpm is based on a chip multiprocessor (CMP) with...
Michael K. Chen, Kunle Olukotun