1133 search results - page 20 / 227 » Compiling for Speculative Architectures |
ICS
1999
Tsinghua U.
14 years 20 days ago
1999
Tsinghua U.
Memory operations remain a significant bottleneck in dynamically scheduled pipelined processors, due in part to the inability to statically determine the existence of memory addr...
ASPLOS
1992
ACM
14 years 15 days ago
1992
ACM
The foremost goal of superscalar processor design is to increase performance through the exploitation of instruction-level parallelism (ILP). Previous studies have shown that spec...
IPPS
2003
IEEE
14 years 1 months ago
2003
IEEE
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
ICCAD
2009
IEEE
13 years 6 months ago
2009
IEEE
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
CC
2009
Springer
14 years 9 months ago
2009
Springer
Speculative parallelisation represents a promising solution to speed up sequential programs that are hard to parallelise otherwise. Prior research has focused mainly on parallelisi...