1133 search results - page 22 / 227 » Compiling for Speculative Architectures |
HPCA
1998
IEEE
14 years 20 days ago
1998
IEEE
Run-time parallelization is often the only way to execute the code in parallel when data dependence information is incomplete at compile time. This situation is common in many imp...
DAC
1999
ACM
14 years 22 days ago
1999
ACM
IEEEPACT
2007
IEEE
14 years 2 months ago
2007
IEEE
In recent years, microprocessor manufacturers have shifted their focus from single-core to multi-core processors. To avoid burdening programmers with the responsibility of paralle...
ARCS
2010
Springer
14 years 1 months ago
2010
Springer
Register renaming is a widely used technique to remove false data dependencies in contemporary superscalar microprocessors. The register rename logic includes a mapping table that ...
APCSAC
2005
IEEE
14 years 2 months ago
2005
IEEE
In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than...