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» Compiling for Speculative Architectures

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IPPS
2006
IEEE

116views Distributed And Parallel Com...» more IPPS 2006»

Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures

14 years 2 months ago

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In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...

Grigoris Dimitroulakos, Michalis D. Galanis, Const...

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CASES
2005
ACM

129views System Software» more CASES 2005»

Compilation techniques for energy reduction in horizontally partitioned cache architectures

13 years 10 months ago

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Horizontally partitioned data caches are a popular architectural feature in which the processor maintains two or more data caches at the same level of hierarchy. Horizontally part...

Aviral Shrivastava, Ilya Issenin, Nikil Dutt

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TC
2010

168views Information Technology» more TC 2010»

Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization

13 years 3 months ago

Download www.esa.informatik.tu-darmstadt.de

We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...

Holger Lange, Andreas Koch

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ASPDAC
2009
ACM

91views Hardware» more ASPDAC 2009»

Thermal-aware post compilation for VLIW architectures

14 years 3 months ago