1133 search results - page 83 / 227 » Compiling for Speculative Architectures |
128
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ICFP
2007
ACM
16 years 3 months ago
2007
ACM
In this paper we present an automated way of using spare CPU resources within a shared memory multi-processor or multi-core machine. Our approach is (i) to profile the execution o...
137
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ISCA
2005
IEEE
15 years 9 months ago
2005
IEEE
RENO is a modified MIPS R10000 register renamer that uses map-table “short-circuiting” to implement dynamic versions of several well-known static optimizations: move eliminat...
122
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IEEEPACT
2000
IEEE
15 years 8 months ago
2000
IEEE
This paper describes the design of a dynamic branchpredictorfor a VLIW processor. The developed branch predictor predicts the direction of a branch, i.e., taken or not taken, and ...
137
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CORR
2010
Springer
15 years 4 months ago
2010
Springer
Based on speculations coming from statistical mechanics and the conjectured existence of critical states, I propose a simple heuristic in order to control the mutation probability...
152
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CJ
2006
15 years 4 months ago
2006
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...