931 search results - page 146 / 187 » Compiling for vector-thread architectures |
141
Voted
DAC
2006
ACM
16 years 3 months ago
2006
ACM
Scheduling plays a central role in the behavioral synthesis process, which automatically compiles high-level specifications into optimized hardware implementations. However, most ...
104
Voted
DAC
2006
ACM
16 years 3 months ago
2006
ACM
Application-specific instruction-set extensions (custom instructions) help embedded processors achieve higher performance. Most custom instructions offering significant performanc...
132
Voted
VLSID
2002
IEEE
16 years 2 months ago
2002
IEEE
This paper shows that software pipelining can be an effective technique for code generation for coarse-grained reconfigurable instruction set processors. The paper describes a tec...
126
click to vote
HPCA
2002
IEEE
16 years 2 months ago
2002
IEEE
Thread-Level Speculation (TLS) allows us to automatically parallelize general-purpose programs by supporting parallel execution of threads that might not actually be independent. ...
107
Voted
HPCA
2002
IEEE
16 years 2 months ago
2002
IEEE
This work is based on our philosophy of providing interlayer system-level power awareness in computing systems [26, 27]. Here, we couple this approach with our vision of multipart...