931 search results - page 178 / 187 » Compiling for vector-thread architectures |
142
click to vote
HPDC
2005
IEEE
15 years 7 months ago
2005
IEEE
good data partitioning scheme is the need of the time. However it is very diflcult to arrive at a good solution as the number of possible dutupartitionsfor a given real lifeprogra...
123
click to vote
IPPS
2005
IEEE
15 years 7 months ago
2005
IEEE
“MegaProto” is a proof-of-concept prototype for our project “Mega-Scale Computing Based on Low-Power Technology and Workload Modeling”, implementing our key idea that a mi...
103
Voted
IPPS
2005
IEEE
15 years 7 months ago
2005
IEEE
In this paper we explore a new clustering approach for reducing the complexity of wide issue in-order processors based on EPIC architectures. Complexity effectiveness is achieved ...
115
Voted
MICRO
2005
IEEE
15 years 7 months ago
2005
IEEE
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
129
click to vote
RTAS
2005
IEEE
15 years 7 months ago
2005
IEEE
While caches have become invaluable for higher-end architectures due to their ability to hide, in part, the gap between processor speed and memory access times, caches (and partic...