931 search results - page 37 / 187 » Compiling for vector-thread architectures |
109
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ISLPED
2005
ACM
15 years 8 months ago
2005
ACM
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
131
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ISCA
2005
IEEE
15 years 8 months ago
2005
IEEE
: The theoretical study of quantum computation has yielded efficient algorithms for some traditionally hard problems. Correspondingly, experimental work on the underlying physical...
125
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ICPPW
2006
IEEE
15 years 8 months ago
2006
IEEE
Modulo scheduling is a major optimization of high performance compilers wherein The body of a loop is replaced by an overlapping of instructions from different iterations. Hence ...
124
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CONCURRENCY
2007
15 years 2 months ago
2007
OpenMP has gained wide popularity as an API for parallel programming on shared memory and distributed shared memory platforms. Despite its broad availability, there remains a need ...
147
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PLDI
2005
ACM
15 years 8 months ago
2005
ACM
Speculative parallelization can provide significant sources of additional thread-level parallelism, especially for irregular applications that are hard to parallelize by conventio...