931 search results - page 67 / 187 » Compiling for vector-thread architectures |
106
Voted
MICRO
2002
IEEE
15 years 2 months ago
2002
IEEE
Convergent scheduling is a general framework for instruction scheduling and cluster assignment for parallel, clustered architectures. A convergent scheduler is composed of many ind...
110
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DAC
2004
ACM
16 years 3 months ago
2004
ACM
Architecture description languages (ADL) have been established to aid the design of application-specific instruction-set processors (ASIP). Their main contribution is the automati...
140
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JPDC
2000
15 years 2 months ago
2000
: SIMD arrays are likely to become increasingly important as coprocessors in domain specific systems as architects continue to leverage RAM technology in their design. The problem ...
122
Voted
MICRO
1998
IEEE
15 years 6 months ago
1998
IEEE
This paper proposes a precise approach to register allocation for irregular-register architectures which is based on 0-1 integer programming (IP). Prior work shows that IP registe...
123
Voted
ARC
2007
Springer
15 years 6 months ago
2007
Springer
The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP)...