903 search results - page 128 / 181 » Completeness Results for Memory Logics |
DSD
2010
IEEE
13 years 7 months ago
2010
IEEE
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
CEC
2008
IEEE
14 years 3 months ago
2008
IEEE
Abstract— Model Checking is a well-known and fully automatic technique for checking software properties, usually given as temporal logic formulae on the program variables. Most o...
ISCAS
2007
IEEE
14 years 3 months ago
2007
IEEE
— Due to continuous technology scaling, the reduction of nodal capacitances and the lowering of power supply voltages result in an ever decreasing minimal charge capable of upset...
VLDB
2004
ACM
14 years 2 months ago
2004
ACM
SQL in the IBM® DB2® Universal Database™ for Linux®, UNIX®, and Windows® (DB2 UDB) database management product has been extended to support nested INSERT, UPDATE, and DELET...
PADS
1997
ACM
14 years 1 months ago
1997
ACM
In traditional optimistic distributed simulation protocols, a logical process(LP) receiving a straggler rolls back and sends out anti-messages. Receiver of an anti-message may als...