903 search results - page 130 / 181 » Completeness Results for Memory Logics |
ATAL
2006
Springer
14 years 21 days ago
2006
Springer
The effective reasoning capability of an agent can be defined as its capability to infer, within a given space and time bound, facts that are logical consequences of its knowledge...
ICDE
2006
IEEE
14 years 10 months ago
2006
IEEE
Existing graph mining algorithms typically assume that databases are relatively static and can fit into the main memory. Mining of subgraphs in a dynamic environment is currently ...
EDBT
2008
ACM
14 years 9 months ago
2008
ACM
Users often do not require a complete answer to their query but rather only a sample. They expect the sample to be either the largest possible or the most representative (or both)...
ICCAD
2007
IEEE
2007
IEEE
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
14 years 5 months ago
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
—We present an embedded software application for the real-time estimation of building occupancy using a network of video cameras. We analyze a series of alternative decomposition...