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» Completeness Results for Memory Logics
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CCGRID
2011
IEEE
13 years 1 months ago
High Performance Pipelined Process Migration with RDMA
—Coordinated Checkpoint/Restart (C/R) is a widely deployed strategy to achieve fault-tolerance. However, C/R by itself is not capable enough to meet the demands of upcoming exasc...
Xiangyong Ouyang, Raghunath Rajachandrasekar, Xavi...
DAC
2003
ACM
14 years 10 months ago
Behavioral consistency of C and verilog programs using bounded model checking
We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the circuit and the program ...
Edmund M. Clarke, Daniel Kroening, Karen Yorav
PLDI
2009
ACM
14 years 10 months ago
Automatic generation of library bindings using static analysis
High-level languages are growing in popularity. However, decades of C software development have produced large libraries of fast, timetested, meritorious code that are impractical...
Tristan Ravitch, Steve Jackson, Eric Aderhold, Ben...
ICCAD
2003
IEEE
148views Hardware» more  ICCAD 2003»
14 years 6 months ago
The Compositional Far Side of Image Computation
Symbolic image computation is the most fundamental computation in BDD-based sequential system optimization and formal verification. In this paper, we explore the use of over-appr...
Chao Wang, Gary D. Hachtel, Fabio Somenzi
PLDI
2010
ACM
14 years 2 months ago
Decoupled lifeguards: enabling path optimizations for dynamic correctness checking tools
Dynamic correctness checking tools (a.k.a. lifeguards) can detect a wide array of correctness issues, such as memory, security, and concurrency misbehavior, in unmodified executa...
Olatunji Ruwase, Shimin Chen, Phillip B. Gibbons, ...