We present a novel method to efficiently generate, compress and apply test patterns in a logic BIST architecture. Patterns are generated by a modified automatic test pattern gener...
Peter Wohl, John A. Waicukauski, Sanjay Patel, Min...
The logical and algorithmic properties of stable conditional independence (CI) as an alternative structural representation of conditional independence information are investigated...
VLIW architectures are popular in embedded systems because they offer high-performance processing at low cost and energy. The major problem with traditional VLIW designs is that t...
Hongtao Zhong, Kevin Fan, Scott A. Mahlke, Michael...
We propose a word level, bounded model checking (BMC) algorithm based on translation into the effectively propositional fragment (EPR) of firstorder logic. This approach to BMC al...
Moshe Emmer, Zurab Khasidashvili, Konstantin Korov...
System BV is an extension of multiplicative linear logic with a non-commutative self-dual operator. In this paper we present systems equivalent to system BV where equalities for un...