903 search results - page 78 / 181 » Completeness Results for Memory Logics |
DAC
2003
ACM
14 years 2 months ago
2003
ACM
We present a novel method to efficiently generate, compress and apply test patterns in a logic BIST architecture. Patterns are generated by a modified automatic test pattern gener...
IJAR
2010
13 years 7 months ago
2010
The logical and algorithmic properties of stable conditional independence (CI) as an alternative structural representation of conditional independence information are investigated...
IEEEPACT
2005
IEEE
14 years 2 months ago
2005
IEEE
VLIW architectures are popular in embedded systems because they offer high-performance processing at low cost and energy. The major problem with traditional VLIW designs is that t...
CADE
2012
Springer
11 years 11 months ago
2012
Springer
We propose a word level, bounded model checking (BMC) algorithm based on translation into the effectively propositional fragment (EPR) of firstorder logic. This approach to BMC al...
ISCIS
2004
Springer
14 years 2 months ago
2004
Springer
System BV is an extension of multiplicative linear logic with a non-commutative self-dual operator. In this paper we present systems equivalent to system BV where equalities for un...