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TCAD
2010
124views more  TCAD 2010»
13 years 2 months ago
A Reconfigurable Source-Synchronous On-Chip Network for GALS Many-Core Platforms
Abstract--This paper presents a GALS-compatible circuitswitched on-chip network that is well suited for use in many-core platforms targeting streaming DSP and embedded applications...
Anh Thien Tran, Dean Nguyen Truong, Bevan M. Baas

Publication
254views
13 years 1 months ago
Z-fighting aware Depth Peeling
Efficient capturing of the entire topological and geometric information of a 3D scene is an important feature in many graphics applications for rendering multi-fragment effects. Ex...
Andreas Vasilakis and Ioannis Fudos
CCGRID
2011
IEEE
12 years 11 months ago
High Performance Pipelined Process Migration with RDMA
—Coordinated Checkpoint/Restart (C/R) is a widely deployed strategy to achieve fault-tolerance. However, C/R by itself is not capable enough to meet the demands of upcoming exasc...
Xiangyong Ouyang, Raghunath Rajachandrasekar, Xavi...
ICDE
2011
IEEE
265views Database» more  ICDE 2011»
12 years 11 months ago
RAFTing MapReduce: Fast recovery on the RAFT
MapReduce is a computing paradigm that has gained a lot of popularity as it allows non-expert users to easily run complex analytical tasks at very large-scale. At such scale, task...
Jorge-Arnulfo Quiané-Ruiz, Christoph Pinkel...
INFOCOM
2011
IEEE
12 years 11 months ago
Throughput and delay scaling of general cognitive networks
—There has been recent interest within the networking research community to understand how performance scales in cognitive networks with overlapping n primary nodes and m seconda...
Wentao Huang, Xinbing Wang