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» Complexity-Effective Superscalar Processors
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APCSAC
2005
IEEE
14 years 1 months ago
Speculative Issue Logic
In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than...
You-Jan Tsai, Jong-Jiann Shieh
ISSS
1998
IEEE
120views Hardware» more  ISSS 1998»
13 years 11 months ago
Application of Instruction Analysis/Synthesis Tools to x86's Functional Unit Allocation
Designing a cost effective superscalar architecture for x86 compatible microprocessors is a challenging task in terms of both technical difficulty and commercial value. One of the...
Ing-Jer Huang, Ping-Huei Xie
EUROPAR
2010
Springer
13 years 5 months ago
Starsscheck: A Tool to Find Errors in Task-Based Parallel Programs
Star Superscalar is a task-based programming model. The programmer starts with an ordinary C program, and adds pragmas to mark functions as tasks, identifying their inputs and outp...
Paul M. Carpenter, Alex Ramírez, Eduard Ayg...
ISCA
2003
IEEE
124views Hardware» more  ISCA 2003»
14 years 24 days ago
Banked Multiported Register Files for High-Frequency Superscalar Microprocessors
Multiported register files are a critical component of high-performance superscalar microprocessors. Conventional multiported structures can consume significant power and die ar...
Jessica H. Tseng, Krste Asanovic
ISCA
1997
IEEE
114views Hardware» more  ISCA 1997»
13 years 11 months ago
Improving Superscalar Instruction Dispatch and Issue by Exploiting Dynamic Code Sequences
Superscalar processors currently have the potential to fetch multiple basic blocks per cycle by employing one of several recently proposed instruction fetch mechanisms. However, t...
Sriram Vajapeyam, Tulika Mitra