271 search results - page 50 / 55 » Complexity-Effective Superscalar Processors |
ISPASS
2006
IEEE
14 years 1 months ago
2006
IEEE
Fast, accurate, and effective performance analysis is essential for the design of modern processor architectures and improving application performance. Recent trends toward highly...
MICRO
2006
IEEE
14 years 1 months ago
2006
IEEE
Instruction aggregation—the grouping of multiple operations into a single processing unit—is a technique that has recently been used to amplify the bandwidth and capacity of c...
MICRO
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper describes a scalable, low-complexity alternative to the conventional load/store queue (LSQ) for superscalar processors that execute load and store instructions speculat...
LCTRTS
2005
Springer
14 years 29 days ago
2005
Springer
Software pipelining is a critical optimization for producing efficient code for VLIW/EPIC and superscalar processors in highperformance embedded applications such as digital sign...
ICS
2004
Tsinghua U.
14 years 26 days ago
2004
Tsinghua U.
In contemporary out-of-order superscalar design, high IPC is mainly achieved by exposing high instruction level parallelism (ILP). Scaling issue window size can certainly provide ...