In the context of general-purpose processing, an increasing number of diverse functional units are added to cover a wide spectrum of applications. However, it is still possible to ...
A critical problem in wide-issue superscalar processors is the limit on cycle time imposed by the central register file and operand bypass network. In this paper, a distributed re...
Santithorn Bunchua, D. Scott Wills, Linda M. Wills
An architecture for a reconfigurable superscalar processor is described in which some of its execution units are implemented in reconfigurable hardware. The overall configuration ...
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
Traditional pulldown comparators that are used to implement associativeaddressing logic in superscalar microprocessors dissipate energy on a mismatch in any bit position in the co...
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad ...