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» Componentizing hardware software interface design
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ASAP
2008
IEEE
120views Hardware» more  ASAP 2008»
13 years 11 months ago
Lightweight DMA management mechanisms for multiprocessors on FPGA
This paper presents a multiprocessor system on FPGA that adopts Direct Memory Access (DMA) mechanisms to move data between the external memory and the local memory of each process...
Antonino Tumeo, Matteo Monchiero, Gianluca Palermo...
MICRO
2010
IEEE
140views Hardware» more  MICRO 2010»
13 years 6 months ago
Moneta: A High-Performance Storage Array Architecture for Next-Generation, Non-volatile Memories
Emerging non-volatile memory technologies such as phase change memory (PCM) promise to increase storage system performance by a wide margin relative to both conventional disks and ...
Adrian M. Caulfield, Arup De, Joel Coburn, Todor I...
SBACPAD
2003
IEEE
121views Hardware» more  SBACPAD 2003»
14 years 2 months ago
Optimizing Packet Capture on Symmetric Multiprocessing Machines
Traffic monitoring and analysis based on general purpose systems with high speed interfaces, such as Gigabit Ethernet and 10 Gigabit Ethernet, requires carefully designed software...
Gianluca Varenni, Mario Baldi, Loris Degioanni, Fu...
DATE
2007
IEEE
99views Hardware» more  DATE 2007»
14 years 3 months ago
Very wide register: an asymmetric register file organization for low power embedded processors
In current embedded systems processors, multi-ported register files are one of the most power hungry parts of the processor, even when they are clustered. This paper presents a n...
Praveen Raghavan, Andy Lambrechts, Murali Jayapala...
DAC
2004
ACM
14 years 10 months ago
Virtual memory window for application-specific reconfigurable coprocessors
Reconfigurable Systems-on-Chip (SoCs) on the market consist of full-fledged processors and large Field-Programmable Gate-Arrays (FPGAs). The latter can be used to implement the sy...
Miljan Vuletic, Laura Pozzi, Paolo Ienne