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» Composing architectural styles from architectural primitives
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GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
12 years 11 months ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...
SIGMOD
2012
ACM
234views Database» more  SIGMOD 2012»
11 years 9 months ago
Oracle in-database hadoop: when mapreduce meets RDBMS
Big data is the tar sands of the data world: vast reserves of raw gritty data whose valuable information content can only be extracted at great cost. MapReduce is a popular parall...
Xueyuan Su, Garret Swart
DAC
2006
ACM
14 years 8 months ago
Prototyping a fault-tolerant multiprocessor SoC with run-time fault recovery
Modern integrated circuits (ICs) are becoming increasingly complex. The complexity makes it difficult to design, manufacture and integrate these high-performance ICs. The advent o...
Xinping Zhu, Wei Qin
HPCA
2001
IEEE
14 years 7 months ago
Self-Tuned Congestion Control for Multiprocessor Networks
Network performance in tightly-coupled multiprocessors typically degrades rapidly beyond network saturation. Consequently, designers must keep a network below its saturation point...
Mithuna Thottethodi, Alvin R. Lebeck, Shubhendu S....
CSE
2009
IEEE
14 years 2 months ago
Using Discovery and Monitoring Services to Support Context-Aware Remote Assisted Living Applications
Ubiquitous and pervasive applications are aware of the context of the used resources. This class of application can benefit from mechanisms to discover resources (devices and sens...
André Luiz B. Rodrigues, Izabela C. Gomes, ...