80 search results - page 4 / 16 » Compressing Functional Tests for Microprocessors |
ITC
2003
IEEE
14 years 18 days ago
2003
IEEE
This paper describes a Hybrid DFT (H-DFT) architecture for low-cost, high quality structural testing in the high volume manufacturing (HVM) environment. This structure efficiently...
MTV
2005
IEEE
14 years 27 days ago
2005
IEEE
Microprocessor technology is increasingly used for many applications; the large market volumes call for cost containment in the production phase. Process yield for processor produ...
VLSISP
2008
13 years 7 months ago
2008
Advanced bit manipulation operations are not efficiently supported by commodity word-oriented microprocessors. Programming tricks are typically devised to shorten the long sequence...
ASAP
2006
IEEE
14 years 1 months ago
2006
IEEE
Current microprocessor instruction set architectures are word oriented, with some subword support. Many important applications, however, can realize substantial performance benefi...
DATE
2002
IEEE
14 years 9 days ago
2002
IEEE
This paper describes the AccuPower toolset -- a set of simulation tools accurately estimating the power dissipation within a superscalar microprocessor. AccuPower uses a true hard...