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» Computer aided analysis and design of power transformers
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ICCAD
1998
IEEE
94views Hardware» more  ICCAD 1998»
14 years 22 days ago
Noise considerations in circuit optimization
Noise can cause digital circuits to switch incorrectly and thus produce spurious results. Noise can also have adverse power, timing and reliability e ects. Dynamic logic is partic...
Andrew R. Conn, Ruud A. Haring, Chandramouli Viswe...
EUROPAR
2006
Springer
14 years 4 days ago
PAM-SoC: A Toolchain for Predicting MPSoC Performance
In the past, research on Multiprocessor Systems-on-Chip (MPSoC) has focused mainly on increasing the available processing power on a chip, while less effort was put into specific s...
Ana Lucia Varbanescu, Henk J. Sips, Arjan J. C. va...
IPPS
2007
IEEE
14 years 2 months ago
United-FS: A Logical File System Providing a Single Image of Multiple Physical File Systems on NFS Server
NFS is considered to be the bottleneck in cluster computing environment because of its limited resources and centralized data management. With the development of hardware, NFS ser...
Huan Chen, Yi Zhao, Jin Xiong, Jie Ma, Ninghui Sun
SAC
2000
ACM
14 years 26 days ago
The Evolution of the DARWIN System
DARWIN is a web-based system for presenting the results of wind-tunnel testing and computational model analyses to aerospace designers. DARWIN captures the data, maintains the inf...
Joan D. Walton, Robert E. Filman, David J. Korsmey...
DATE
2008
IEEE
116views Hardware» more  DATE 2008»
14 years 3 months ago
A Variation Aware High Level Synthesis Framework
— The worst-case delay/power of function units has been used in traditional high level synthesis to facilitate design space exploration. As technology scales to nanometer regime,...
Feng Wang 0004, Guangyu Sun, Yuan Xie